RFIC/Analog Design Engineer – RX

Responsible for high-performance and low power RFIC Transceiver Design for LTE, GNSS, WiFi, Bluetooth, Zigbee and other communication systems.

Minimum Qualifications

  • MS or PhD in Electrical Engineering with 7+ years of experience in RF/Analog IC design with advanced CMOS technology nodes. SOI technology experience a plus.
  • Detailed understanding of RFIC circuit design. Direct tape-out experience with one or more of the following blocks: LNA, Mixer, PLL, LO Generation, VGA, Baseband Filters, TIA and other baseband analog blocks.
  • Good understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, offset and other analog impairments.
  • Good understanding of CMOS device physics, RF device modeling, device noise parameters, inductor modeling and EM simulation.
  • Knowledge of QFN & CSP packaging effects, supply isolations, circuit layout for optimum RF performance, EM effects, PEX (post-layout parasitic extraction).
  • Familiar with various RF transceiver architectures and their trade-offs, as well as calibration methods used for various architectures.
  • Experience in using development tools including Cadence Virtuoso, Spectre RF, EMX & MATLAB.
  • Understanding of system specifications and ability to translate system requirement into circuit requirement at IC level. Deep knowledge of RF concepts including S-parameters, NF, Stability, P1dB, HD, IMD, IIP2/3.
  • Hands-on experience in silicon characterization and debug.
  • Team player with good verbal and written communication skills along with excellent presentations skills (MS Office Suite). Strong sense of urgency.

Desired Qualifications

  • 12+ years of RF/Analog IC design.
  • Receiver (RX) Design up to 6GHz from RF to Baseband with experience as a Technical Lead.

Remote (hybrid) option for the right candidate(s).

Job Type: Full Time
Job Location: Irvine CA Pleasanton CA

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