Analog Design Engineer (ADC & DAC)

Responsible for high-performance and low power Data Converters (ADC & DAC) for LTE, GNSS, WiFi, Bluetooth, Zigbee and other communication systems.

Minimum Qualifications

  • MS or PhD in Electrical Engineering with 7+ years of experience in Analog/Mixed-Signal Data Converter design with advanced CMOS technology nodes. SOI technology experience a plus.
  • Detailed understanding with direct tape-out experience of various ADC/DAC architectures including SAR ADC, Pipeline ADC, Sigma-Delta ADC, Current Steering DACs, R-2R DAC, etc.
  • Knowledge of the following analog building blocks: Band-Gaps, LDOs, Op-amps, comparators, biasing circuits, switched-capacitor circuits as well as feedback & compensation techniques.
  • Good understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability, offset and other analog impairments.
  • Knowledge of QFN & CSP packaging effects, supply isolations, circuit layout for optimum Analog/RF performance, EM effects, PEX (post-layout parasitic extraction).
  • Familiar with various RF transceiver architectures and their trade-offs, as well as calibration methods used for various architectures.
  • Experience in using development tools including Cadence Virtuoso, Spectre RF, MATLAB and Verilog modeling.
  • Understanding of system specifications and ability to translate system requirement into circuit requirement at IC level.
  • Hands-on experience in silicon characterization and debug.
  • Team player with good verbal and written communication skills along with excellent presentations skills (MS Office Suite). Strong sense of urgency.

Desired Qualifications

  • 12+ years of Analog/Mixed-Signal Data Converter design.
  • High-Speed ADC Design (> 500 MS/s) experience a MUST.  Technical Lead experience a plus.
  • Mixed-Mode simulation experience.

Remote (hybrid) option for the right candidate(s).

Job Type: Full Time
Job Location: Irvine CA Pleasanton CA

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